1. Field of the Invention
The invention relates to shift register circuit; in particular, to a voltage adjusting circuit applied in the shift register circuit using its voltage lowering mechanism to reduce the shift degree of threshold voltage of transistors in the shift register circuit.
2. Description of the Prior Art
In recent years, with the advances in display technology, liquid crystal displays have become the most widely used display device. In the driving circuit of the liquid crystal display, the main structure of a shift register circuit is a series of flip-flops; an output terminal of one flip-flop is coupled to an input terminal of next flip-flop. All flip-flops receive a common clock to move data from one stage to the next stage.
Please refer to FIG. 1 and FIG. 2. FIG. 1 and FIG. 2 illustrate a schematic diagram and a timing diagram of a conventional shift register circuit respectively. As shown in FIG. 1 and FIG. 2, in the conventional shift register circuit, as to the transistors NT2 and NT4, only in the periods of two pulses when the input terminal IN is at high level (the voltage is VDD) and the output terminal OUT is at high level (the voltage is VDD), the bias voltages of the gate-source voltages Vgs2 and Vgs4 of the transistors NT2 and NT4 will be zero. In other times, the bias voltages of the gate-source voltages Vgs2 and Vgs4 of the transistors NT2 and NT4 will be positive bias voltages.
In this condition, because the transistors NT2 and NT4 may generate serious threshold voltage shifts due to the positive bias voltages of the transistors NT2 and NT4. As shown in FIG. 3, the threshold voltages Vth2 and Vth4 of the transistors NT2 and NT4 will be increased with the increasing of using time t. Once the transistors NT2 and NT4 generate serious threshold voltage shifts, the threshold voltages of the transistors NT2 and NT4 will be larger than the normal value. This will cause the voltage decreasing of the output stage in the shift register circuit.
In addition, as another conventional shift register circuit shown in FIG. 4, when the voltage of the (n−1)th output stage OUTPUT (n−1) decreases, the first transistor T1 will generate current leakage, and the second transistor T2 fails to perform a bootstrapping mechanism, so that the voltage of the Q point will be abnormal, and the output voltage of the n-th output stage OUTPUT (n) will be also abnormal.
Therefore, the invention provides a voltage adjusting circuit applied in a shift register circuit and a voltage adjusting method thereof to solve the above-mentioned problems.